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Cypress Semiconductor /psoc63 /FLASHC /FM_CTL /WAIT_CTL

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Interpret as WAIT_CTL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WAIT_FM_MEM_RD 0WAIT_FM_HV_RD 0WAIT_FM_HV_WR

Description

Wiat State control

Fields

WAIT_FM_MEM_RD

Number of C interface wait cycles (on ‘clk_c’) for a read from the memory
WAIT_FM_HV_RD

Number of C interface wait cycles (on ‘clk_c’) for a read from the high Voltage page latches. Common for reading HV Page Latches and the DATA_COMP_RESULT bit
WAIT_FM_HV_WR

Number of C interface wait cycles (on ‘clk_c’) for a write to the high Voltage page latches.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data